• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    A method and apparatus for lapping or polishing a semiconductor silicon single crystal wafer is provided for eliminating the transfer of waviness of a wafer cut by a wire saw apparatus, improving the quality of the wafer, realizing automated lapping or polishing processes, allowing for single crystal processing from a cassette to another cassette, and increasing the workability and labor productivity. A small amount of single-side lapping or single-side polishing is repeated alternately on the two surfaces of a semiconductor silicon single crystal wafer to get to a predetermined total lapping or polishing stock removal.
    公开号:US20010008801A1
    申请号:US09/270,274
    申请日:1999-03-16
    公开日:2001-07-19
    发明作者:Kohei Toyama
    申请人:Shin Etsu Handotai Co Ltd；
    IPC主号:H01L21-02013
    专利说明:
    [0001] 1. Field of the Invention [0001]
    [0002] The present invention relates to a method and apparatus for lapping or polishing semiconductor silicon single crystal wafer which can produce a wafer having a high degree of flatness in a lapping or polishing step of a semiconductor silicon single crystal wafer, particularly, a large diameter semiconductor silicon single crystal wafer. [0002]
    [0003] 2. Description of the Related Art [0003]
    [0004] With a lapping apparatus currently in use for lapping semiconductor silicon single crystal wafers, as works (semiconductor silicon single crystal wafers) have larger diameters, they are generally lapped without reducing the number of works simultaneously loaded or processed in order to pursue higher productivity. [0004]
    [0005] As a result, the lapping apparatus have become larger and heavier, as having a weight of 30-40 tons, so that reconsideration must be taken even for the construction of a building for accommodating the lapping apparatus or the like. [0005]
    [0006] As works of larger diameters are used and apparatus of larger sizes are introduced, a longer time is required for loading and unloading the works for lapping. In view of true working efficiency, the influence of the time required for such operations cannot be ignored. [0006]
    [0007] In considering automated loading operations and so on, difficulties are encountered in loading a plurality of wafers on each of a plurality of carriers, so that a problem arises in bringing the automation into practice. [0007]
    [0008] From a view point of a reduction in weight of apparatus and automation with an introduction of single wafer processing, grinding with a bonded abrasive has been considered as an alternative to lapping but not yet introduced into mass production processes. [0008]
    [0009] The processing of a semiconductor silicon single crystal wafer is basically proceeded in a sequence of slicing, lapping, etching, polishing and cleaning steps. [0009]
    [0010] As works (semiconductor silicon single crystal wafers) have larger diameters, the production scheme has also been changed in form. Specifically, for the slicing, an inner diameter saw has been replaced with a wire saw apparatus. [0010]
    [0011] A wafer cut by a wire saw apparatus, however, exhibits a large deformation called “undulations (waviness)” (cross-sectional shape of the wafer) due to the characteristics of the wire saw apparatus, largely affecting the quality of final mirror-polished wafer (sori, bow, flatness and so on). [0011]
    [0012] Generally, for applying the grinding, a vacuum chuck made of ceramics or porous metal, stainless steel or the like is used to chuck a wafer cut by a wire saw apparatus, and the wafer is ground or lapped without a break to a predetermined total grinding or lapping stock removal such as about 50 μm or more for a single side and about 100 μm or more for double sides. However, from the relationship between the hardness of a chucking surface and waviness of the wafer, the transferred waviness remains in the ground or lapped wafer, which is a problem. [0012]
    [0013] The polishing also implies similar problems to those of the lapping as mentioned above. In the polishing, a wafer is polished without a break to a predetermined total polishing stock removal, for example, about 10 μm for a single side and about 20 μm for double sides. Again, the transferred waviness remains in the polished wafer, resulting in a problem as is the case of the lapping. [0013] OBJECT AND SUMMARY OF THE INVENTION
    [0014] The present invention has been made in view of the above-mentioned problem inherent to the prior art, and it is an object of the present invention to provide a method and apparatus for lapping or polishing a semiconductor silicon single crystal wafer which can eliminate the transfer of waviness of a wafer cut by a wire saw apparatus, improve the quality of the wafer, realize automated lapping or polishing processes, allow for single wafer processing from a cassette to another cassette, and increase the workability and labor productivity. [0014]
    [0015] To achieve the above object, a method for lapping a semiconductor silicon single crystal wafer according to the present invention is characterized in that a small amount of single-side lapping is repeated alternately on the two surfaces of a semiconductor silicon single crystal wafer to get to a predetermined total lapping stock removal. The stock removal of the small amount of single-side lapping is preferably in a range of 10 to 20 μm. [0015]
    [0016] The lapping method according to the present invention involves chucking a wafer on a vacuum chuck, lapping one surface of the wafer in a range of 10-20 μm, inverting the wafer to lap the other surface thereof in a range of 10-20 μm, and repetitively lapping the two surfaces alternately in a range of 10-20 μm to get to a predetermined total lapping stock removal, for example, 50 μm for one side and 100 μm for double sides. [0016]
    [0017] In the lapping method for the present invention, a small amount of single-side lapping is repeated alternately on the two surfaces of the wafer to get to a predetermined lapping stock removal so that the formation of a reference surface is consequently divided by alternately repeating the single-side lapping. As a result, the transfer of waviness of a wafer caused by a wire saw apparatus, occurring when a predetermined stock removal of lapping is performed without a break, can be alleviated. [0017]
    [0018] A method for polishing a semiconductor silicon single crystal wafer according to the present invention is characterized in that a small amount of single-side polishing is repeated alternately on the two surfaces of a semiconductor silicon single crystal wafer to get to a predetermined polishing stock removal. The stock removal of the small amount of single-side polishing is preferably in a range of 1 to 3 μm. [0018]
    [0019] The polishing method according to the present invention involves holding a wafer on a vacuum chuck, polishing one surface of the wafer in a range of 1-3 μm, inverting the wafer to polish the other surface thereof in a range of 1-3 μm, and repetitively polishing alternately the two surfaces in a range of 1-3 μm to get to a predetermined total polishing stock removal, for example, 10 μm for one side and 20 μm for double sides. [0019]
    [0020] In the polishing method for the present invention, a small amount of single-side polishing is repeated alternately on the two surfaces of a wafer to get to a predetermined total polishing stock removal so that the formation of a reference surface is consequently divided by alternately repeating the single-side polishing. As a result, the transfer of waviness of a wafer caused by a wire saw apparatus, occurring when a predetermined stock removal of polishing is performed without a break, can be alleviated. [0020]
    [0021] An apparatus for lapping or polishing a semiconductor silicon single crystal wafer comprises a wafer chuck for holding a semiconductor silicon single crystal wafer, and a lapping table or a polishing table for lapping or polishing one surface of the semiconductor silicon single crystal wafer held by the wafer chuck. [0021]
    [0022] A wafer inverting device may be provided near the wafer chuck for inverting a semiconductor silicon single crystal wafer, so that the wafer can be readily inverted. [0022]
    [0023] As described above, the present invention can produce effects such as eliminating the transfer of waviness of a wafer cut by a wire saw apparatus, improving the quality of the wafer, realizing automated lapping or polishing, allowing for single wafer processing from a cassette to another cassette, and increasing the workability and labor productivity. [0023] BRIEF DESCRIPTION OF THE DRAWINGS
    [0024] FIG. 1 is a partially cross-sectional explanatory diagram schematically illustrating a lapping apparatus body (or a polishing apparatus body) according to the present invention; [0024]
    [0025] FIG. 2 is a top plan view of an upper lapping (polishing) table of the lapping apparatus body (or the polishing apparatus body) illustrated in FIG. 1; [0025]
    [0026] FIG. 3 is a top plan view illustrating a chucking surface of a chuck table in the lapping apparatus body (or the polishing apparatus body) of FIG. 1; [0026]
    [0027] FIG. 4 is a plan explanatory view generally illustrating the whole arrangement of the lapping apparatus (or the polishing apparatus) according to the present invention; and [0027]
    [0028] FIGS. [0028] 5A-5G are cross-sectional views showing a sequence of steps in a lapping method (or a polishing method) according to the present invention. DESCRIPTION OF THE PREFERRED EMBODIMENTS
    [0029] The present invention will hereinafter be described in conjunction with the preferred embodiments thereof with reference to the accompanying drawings. [0029]
    [0030] Referring first to FIG. 1, a lapping apparatus body according to the present invention is generally designated by reference numeral [0030] 12. The lapping apparatus body 12 includes a wafer chuck 14 for holding a wafer W; and a grooved upper lapping table 16 positioned opposite to and above the wafer chuck 14.
    [0031] The wafer chuck [0031] 14 is composed of a chuck table 20 formed with a receiving recess 18 in a central portion of the top surface, and a porous chuck plate 22 inserted in the receiving recess 18 (see FIG. 3). A lower distance (gap) sensor 24 is disposed in the top surface of a peripheral portion of the chuck table 20.
    [0032] The chuck table [0032] 20 is formed with a vacuum suction port 26 which extends through a central portion thereof. A lower rotating shaft 28 extends downwardly from a central portion of the bottom surface of the chuck table 20. The grooved upper lapping table 16 is formed with grooves 30 in a grid form on the bottom surface thereof (see FIG. 2). The proper number of slurry supply ports 32 is formed at intersections of the grooves 30.
    [0033] Reference numeral [0033] 34 designates a slurry supply pipe which supplies the slurry supply port 32 with a slurry. An upper distance (gap) sensor 36 is disposed in the bottom surface of a peripheral portion of the grooved upper lapping table 16 corresponding to the lower distance sensor 24.
    [0034] An upper rotating shaft [0034] 38 is implanted on a central portion of the top surface of the grooved upper lapping table 16. A stopper 40 is provided for fixing the upper rotating shaft 38.
    [0035] In the present invention, the lapping apparatus body [0035] 12 as mentioned above is used to repeat a small amount of single-side lapping alternately on the two surfaces of the wafer W. In the following, a lapping apparatus 10, which is a combination of the lapping apparatus body 12 and a wafer inverting mechanism, will be described with reference to FIG. 4.
    [0036] Referring specifically to FIG. 4, the lapping apparatus [0036] 10 is equipped with a wafer inverting device 42. The wafer inverting device 42 has a robot hand 44. By manipulating the robot hand 44, wafers W accommodated in cassettes 46 a, 46 b, 46 c, 46 d disposed around the wafer inverting device 42 can be taken therefrom and inverted.
    [0037] A pair of wafer centering devices [0037] 48 are disposed adjacent to the wafer inverting device 42. Wafers W taken from the cassettes 46 a-46 d are transported to and carried on the wafer centering devices 48 through the wafer inverting device 42.
    [0038] Transfer arms [0038] 50 are disposed adjacent to the respective wafer centering devices 48. Each of the transfer arms 50 chucks the wafer W carried on the corresponding wafer centering device 48, and places the chucked wafer W on the wafer chuck 14 of the lapping apparatus body 12 similarly disposed nearby.
    [0039] A wafer W which has one side single-side lapped by the lapping apparatus body [0039] 12 is inverted by the action of the transfer arm 50, the wafer centering device 48 and the wafer inverting device 42. The inverted wafer W is placed on the top surface of the wafer chuck 14 of the lapping apparatus body 12 by the wafer centering device 48 and the transfer arm 50, and the other side of the wafer W is single-side lapped.
    [0040] According to the lapping apparatus [0040] 10 of the present invention as described above, the alternate one-side lapping on the two surfaces of the wafer W can be readily performed. The lapping method according to the present invention will be described in greater detail with reference to the cross-sectional views of FIGS. 5A-5G.
    [0041] FIG. 5A illustrates a waved cross-sectional shape of a wafer W cut by a wire saw apparatus. First, a side A of the wafer W is chucked on the wafer chuck [0041] 14 of the lapping apparatus body 12, and the opposite side (side B) is lapped by a small lapping stock removal e, for example, in a range of 10 to 20 μm with reference to the chucking surface (FIG. 5B).
    [0042] Next, the wafer W is inverted, and the lapped side B is chucked by the wafer chuck [0042] 14, and the opposite side (side A) is lapped by the small lapping stock removal e, for example, in a range of 10 to 20 μm. In this state, the side A chucked in FIG. 5B presents smaller waviness as illustrated in FIG. 5C.
    [0043] Subsequently, the wafer W is again inverted, and the side B is lapped by the small lapping stock removal e, for example, in a range of 10 to 20 μm (FIG. 5D). In the following, the inversion of the wafer W and the single-side lapping are repeated. As the waviness is gradually reduced, the lapping stock removal e may also be reduced (FIGS. 5E and 5F). [0043]
    [0044] By thus repeating the single-side lapping, the wafer W is lapped to a predetermined total lapping stock removal (100 μm or more), and the resulting wafer W after the completion of lapping is free from waviness and thus has flat surfaces in its finished shape (FIG. 5G). [0044]
    [0045] Thus repeating a small amount of lapping alternately on the top and bottom surfaces of a wafer until a predetermined total lapping stock removal is completed, leads to a large contribution in eliminating the transfer of waviness of a wafer cut by a wire saw apparatus, thereby improving the quality of the wafer. [0045]
    [0046] Operations involved in the lapping method according to the present invention can be automatically performed, in which case means for detecting that lapping has been performed by the predetermined small lapping stock removal e (for example, 10-20 μm) must be set near the lapping apparatus body [0046] 12.
    [0047] The automatic lapping apparatus carries a wafer from a cassette to the lapping apparatus body, and starts lapping the wafer. When the detecting means comprising upper and lower distance sensors [0047] 36, 24 detects that the wafer has been lapped by the predetermined small lapping stock removal e and generates a signal indicative of the detection, the lapping is stopped in response to the detection signal. Then, the wafer is inverted, and the opposite side is lapped. This operation is repeated to finally lap the wafer to a predetermined total lapping stock removal (100 μm or more), and then the wafer is accommodated in the cassette.
    [0048] The employment of the single-side lapping can realize automation which has been difficult with double-side lapping. In addition, single wafer processing from a cassette to another cassette can be performed, thereby making it possible to improve the workability and labor productivity. [0048]
    [0049] While the lapping apparatus according to the present invention includes a function for adjusting the temperature of the upper lapping table [0049] 16 by controlling flow rate and/or temperature of cooling water supplied to the upper lapping turn table by a cooling water supplying unit. The lapping apparatus also includes a function for adjusting an over-lap amount for the upper lapping table 16 to the wafer chuck 14 by moving the upper lapping table 16 back and forth in swinging manner by a motor or the like. The lapping apparatus further includes a load adjusting function of upper lapping table 16 and so on for adjusting a lapping speed by changing weight applied to upper lapping table or by changing pressure of air, water, oil and the like used for applying a load to upper lapping table 16.
    [0050] A polishing apparatus according to the present invention has a similar construction to the lapping apparatus [0050] 10 according to the present invention except that a soft or viscoelastic polishing pad is attached on a polishing table, so that repetitive explanation of the polishing apparatus with reference to drawings is omitted. According to the polishing apparatus of the present invention, single-side polishing can be readily accomplished alternately on the two sides of a wafer W. A polishing method according to the present invention is proceeded in a manner similar to the steps of the lapping method according to the present invention illustrated in FIGS. 5A-5G, except that the polishing method uses a mixture of polishing abrasive grains made of finer particles such as colloidal silica than lapping abrasive grains such as alumina and a processing liquid. Therefore, the polishing method will be described in brief with reference to the same FIGS. 5A-5G.
    [0051] First, a side A of a wafer W is chucked on the wafer chuck [0051] 14 of the polishing apparatus, and the opposite side (side B) is polished by a small polishing stock removal e, for example, in a range of 1 to 3 μm with reference to the chucking surface (FIG. 5B).
    [0052] Next, the wafer W is inverted, and the polished side B is chucked by the wafer chuck [0052] 14, and the opposite side (side A) is polished by the small polishing stock removal e, for example, in a range of 1 to 3 μm. In this state, the side A chucked in FIG. 5B presents smaller waviness as illustrated in FIG. 5C.
    [0053] Subsequently, the wafer W is again inverted, and the side B is polished by the small polishing stock removal e, for example, in a range of 1 to 3 μm (FIG. 5D). In the following, the inversion of the wafer W and the single-side polishing are repeated. As the waviness is gradually reduced, the polishing stock removal e may also be reduced (FIGS. 5E and 5F). [0053]
    [0054] By thus repeating the single-side polishing, the wafer W is polished to a predetermined total polishing stock removal (approximately 20 μm), and the resulting wafer W after the completion of polishing is free from waviness and thus has flat surfaces in its finished shape (FIG. 5G). [0054]
    [0055] Thus repeating a small amount of polishing alternately on the top and bottom surfaces of a wafer until a predetermined polishing stock removal is completed, leads to a large contribution in eliminating the transfer of waviness of a wafer cut by a wire saw apparatus, thereby improving the quality of the wafer. [0055]
    [0056] Operations involved in the polishing method according to the present invention can also be automatically performed, in which case means for detecting that polishing has been performed by the predetermined small polishing stock removal e (for example, 1-3 μm) must be set near the polishing apparatus body. [0056]
    [0057] The automatic polishing apparatus carries a wafer from a cassette to the polishing apparatus body, and starts polishing the wafer. When the detecting means comprising upper and lower distance sensors detects that the wafer has been polished by the predetermined small polishing stock removal e and generates a signal indicative of the detection, the polishing is stopped in response to the detection signal. Then, the wafer is inverted, and the opposite side is polished. This operation is repeated to finally polish the wafer to a predetermined total polishing stock removal (approximately 20 μm), and then the wafer is accommodated in the cassette. [0057]
    [0058] The employment of the single-side polishing can realize automation which has been difficult with double-side polishing. In addition, single wafer processing from a cassette to another can be performed, thereby making it possible to improve the workability and labor productivity. [0058]
    [0059] While the polishing apparatus according to the present invention includes a function for adjusting the temperature of the upper polishing table [0059] 16 by controlling flow rate and/or temperature of cooling water supplied to the upper polishing turn table by a cooling water supplying unit. The polishing apparatus also includes a function for adjusting an over-polish amount of the upper polishing table 16 to the wafer chuck 14 by moving the upper polishing table 16 back and forth in swinging manner by a motor or the like. The polishing apparatus further includes a load adjusting function of upper polishing table 16 and so on for adjusting a polishing speed by changing weight applied to upper polishing table or by changing pressure of air, water, oil and like used for applying a load to upper polishing table 16.
    [0060] Obviously, various minor changes and modifications of the present invention are possible in the light of the above teaching. It is therefore to be understood that within the scope of appended claims the invention may be practiced otherwise than as specifically described. [0060]
    权利要求:
    Claims (8)
    [1" id="US-20010008801-A1-CLM-00001] 1. A method for lapping a semiconductor silicon single crystal wafer, wherein a small amount of single-side lapping is repeated alternately on the two surfaces of a semiconductor silicon single crystal wafer to get to a predetermined total lapping stock removal.
    [2" id="US-20010008801-A1-CLM-00002] 2. A method for lapping a semiconductor silicon single crystal wafer according to
    claim 1 , wherein stock removal of said small amount of single-side lapping is in a range of 10 to 20 μm.
    [3" id="US-20010008801-A1-CLM-00003] 3. An apparatus for lapping a semiconductor silicon single crystal wafer comprising:
    a wafer chuck for holding a semiconductor silicon single crystal wafer; and
    a lapping table for lapping one surface of the semiconductor silicon single crystal wafer held by said wafer chuck.
    [4" id="US-20010008801-A1-CLM-00004] 4. An apparatus for lapping a semiconductor silicon single crystal wafer according to
    claim 3 , further comprising a wafer inverting device disposed near said wafer chuck for inverting a semiconductor silicon single crystal wafer.
    [5" id="US-20010008801-A1-CLM-00005] 5. A method for polishing a semiconductor silicon single crystal wafer, wherein a small amount of single-side polishing is repeated alternately on the two surfaces of a semiconductor silicon single crystal wafer to get to a predetermined total polishing stock removal.
    [6" id="US-20010008801-A1-CLM-00006] 6. A method for polishing a semiconductor silicon single crystal wafer according to
    claim 5 , wherein stock removal of said small amount of single-side polishing is in a range of 1 to 3 μm.
    [7" id="US-20010008801-A1-CLM-00007] 7. An apparatus for polishing a semiconductor silicon single crystal wafer comprising:
    a wafer chuck for holding a semiconductor silicon single crystal wafer; and
    a polishing table for polishing one surface of the semiconductor silicon single crystal wafer held by said wafer chuck.
    [8" id="US-20010008801-A1-CLM-00008] 8. An apparatus for polishing a semiconductor silicon single crystal wafer according to
    claim 7 , further comprising a wafer inverting device disposed near said wafer chuck for inverting a semiconductor silicon single crystal wafer.
    类似技术:
    公开号 | 公开日 | 专利标题
    US6387809B2|2002-05-14|Method and apparatus for lapping or polishing semiconductor silicon single crystal wafer
    EP1808887B1|2011-11-30|Production method of semiconductor wafer
    JP3925580B2|2007-06-06|Wafer processing apparatus and processing method
    JP4838614B2|2011-12-14|Semiconductor substrate planarization apparatus and planarization method
    EP1261020A1|2002-11-27|Wafer manufacturing method, polishing apparatus, and wafer
    CN101959647B|2012-08-08|Carrier for double-side polishing device, and double-side polishing device and double-side polishing method that use same
    KR100511381B1|2005-08-31|Semiconductor wafer with improved local flatness, and process for its production
    KR20010033902A|2001-04-25|Semiconductor wafer and production method therefor
    US5981301A|1999-11-09|Regeneration method and apparatus of wafer and substrate
    TW201351497A|2013-12-16|Method for fabricating semiconductor wafer
    US6334808B1|2002-01-01|Method for processing peripheral portion of thin plate and apparatus therefor
    JPH10180624A|1998-07-07|Device and method for lapping
    CN110394711A|2019-11-01|A kind of grinding device, chamfer processing method and device and processing method
    US6406357B1|2002-06-18|Grinding method, semiconductor device and method of manufacturing semiconductor device
    US8376810B2|2013-02-19|Method for chemically grinding a semiconductor wafer on both sides
    JP4388454B2|2009-12-24|Work holding plate, semiconductor wafer manufacturing method and polishing method
    TW426584B|2001-03-21|Method of polishing semiconductor wafers
    JP2007027488A|2007-02-01|Method for polishing semiconductor wafer
    JP5007527B2|2012-08-22|Wafer manufacturing method
    JP2001071244A|2001-03-21|Precise chamfering method for semiconductor wafer
    US6217417B1|2001-04-17|Method for polishing thin plate and plate for holding thin plate
    JP2001007064A|2001-01-12|Grinding method of semiconductor wafer
    JPH10277931A|1998-10-20|Manufacture of hard substrate and its device
    JP2628448B2|1997-07-09|Mirror polishing method for semiconductor substrate
    JP2009289877A|2009-12-10|Semiconductor wafer
    同族专利:
    公开号 | 公开日
    US6387809B2|2002-05-14|
    GB9906029D0|1999-05-12|
    TW430587B|2001-04-21|
    JP3271658B2|2002-04-02|
    GB2335619A|1999-09-29|
    JPH11267965A|1999-10-05|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    US20070254192A1|2004-08-31|2007-11-01|Showa Denko K.K.|Method of Polishing Eng Surfaces of a Substrate for a Recording Medium by a Grain Flow Processing Method|
    US20130035020A1|2007-10-29|2013-02-07|Molnar Charles J|Versatile workpiece refining|
    EP1497854B1|2002-04-23|2019-08-07|Soitec|Method for fabricating a soi substrate with a high resistivity support substrate|
    WO2020119779A1|2018-12-14|2020-06-18|大连理工大学|Semiconductor wafer photoelectrochemical mechanical polishing processing device and processing method|JP2910507B2|1993-06-08|1999-06-23|信越半導体株式会社|Method for manufacturing semiconductor wafer|
    US5967882A|1997-03-06|1999-10-19|Keltech Engineering|Lapping apparatus and process with two opposed lapping platens|JP2001209981A|1999-02-09|2001-08-03|Ricoh Co Ltd|Device and method for forming optical disk substrate film, manufacturing method for substrate holder, substrate holder, optical disk and phase change recording optical disk|
    US7288465B2|2003-04-15|2007-10-30|International Business Machines Corpoartion|Semiconductor wafer front side protection|
    US7910218B2|2003-10-22|2011-03-22|Applied Materials, Inc.|Cleaning and refurbishing chamber components having metal coatings|
    US7670436B2|2004-11-03|2010-03-02|Applied Materials, Inc.|Support ring assembly|
    US7402520B2|2004-11-26|2008-07-22|Applied Materials, Inc.|Edge removal of silicon-on-insulator transfer wafer|
    US7208325B2|2005-01-18|2007-04-24|Applied Materials, Inc.|Refreshing wafers having low-k dielectric materials|
    US7659206B2|2005-01-18|2010-02-09|Applied Materials, Inc.|Removal of silicon oxycarbide from substrates|
    US8617672B2|2005-07-13|2013-12-31|Applied Materials, Inc.|Localized surface annealing of components for substrate processing chambers|
    US7762114B2|2005-09-09|2010-07-27|Applied Materials, Inc.|Flow-formed chamber component having a textured surface|
    US9127362B2|2005-10-31|2015-09-08|Applied Materials, Inc.|Process kit and target for substrate processing chamber|
    US8647484B2|2005-11-25|2014-02-11|Applied Materials, Inc.|Target for sputtering chamber|
    US20070283884A1|2006-05-30|2007-12-13|Applied Materials, Inc.|Ring assembly for substrate processing chamber|
    US7981262B2|2007-01-29|2011-07-19|Applied Materials, Inc.|Process kit for substrate processing chamber|
    US8083963B2|2007-02-08|2011-12-27|Applied Materials, Inc.|Removal of process residues on the backside of a substrate|
    US7942969B2|2007-05-30|2011-05-17|Applied Materials, Inc.|Substrate cleaning chamber and components|
    US7824245B2|2007-08-02|2010-11-02|Epir Technologies, Inc.|Automated chemical polishing system adapted for soft semiconductor materials|
    CN109648463B|2018-12-14|2021-04-23|厦门大学|Photoelectric chemical mechanical polishing processing method for semiconductor wafer|
    CN109465739B|2018-12-14|2021-07-13|大连理工大学|Semiconductor wafer photoelectrochemistry mechanical polishing processingequipment|
    法律状态:
    1999-03-16| AS| Assignment|Owner name: SHIN-ETSU HANDOTAI CO., LTD., JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:TOYAMA, KOHEI;REEL/FRAME:009841/0550 Effective date: 19990309 |
    2005-11-30| REMI| Maintenance fee reminder mailed|
    2006-05-15| LAPS| Lapse for failure to pay maintenance fees|
    2006-06-14| STCH| Information on status: patent discontinuation|Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |
    2006-07-11| FP| Expired due to failure to pay maintenance fee|Effective date: 20060514 |
    优先权:
    申请号 | 申请日 | 专利标题
    JP7435898A|JP3271658B2|1998-03-23|1998-03-23|Method for lapping or polishing semiconductor silicon single crystal wafer|
    JP10-074358||1998-03-23||
    [返回顶部]